CMOS transconductance multipliers:: A tutorial

Gunhee Han

doi:10.1109/82.746667

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CMOS transconductance multipliers:: A tutorial

1998-01-01

241

PRE

Gunhee Han

E. Sánchez‐Sinencio

DOI：10.1109/82.746667

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Abstract

En 中文

Real-time analog multiplication of two signals is one of the mast important operations in analog signal processing. The multiplier is used not only as a computational building block but also as a programming element in systems such as filters, neural networks, and as mixers and modulators in a communication system. Although high performance bipolar junction transistor multipliers have been available for some time, the CMOS multiplier implementation is still a challenging subject especially for low-voltage and low-power circuit design. Despite the large number of papers proposing new MOS multiplier structures, they can be roughly grouped into a few categories. This tutorial provides a complete survey of CMOS multipliers, presents a unified generation of multiplier architectures, and proposes the most recommended MOS multiplier structure. This tutorial could serve as a starting reference point (and metric) for comparison of new CMOS multiplier circuit configurations. An illustrative CMOS chip prototype verifying theoretical results is presented.

Keywords:

CMOS multipliers

low noise design

low voltage circuits

multipliers

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