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Constraint-Aware Annealing for CMOS-Based Ising Machine LDPC Decoder
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DOI：10.1109/TCSII.2025.3532665.png)
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Abstract
En 中文
Ising machines are efficient hardware solvers for combinatorial optimization problems (COPs). In CMOS-based Ising machines, the annealing process is crucial for efficiently navigating complex energy landscapes in mapped COPs such as Max-Cut and low-density parity-check (LDPC) decoding. QuBRIM, a CMOS-based Ising machine, has recently been utilized to solve LDPC decoding problems using multi-body interactions. A constraint-aware annealing schedule is proposed that increases the efficiency of solving the mapped COP. The proposed annealing method uses knowledge of the LDPC decoding problem to guide the annealing process. The annealing schedule is demonstrated through high-level simulations. The proposed methodology demonstrates a normalized energy efficiency (NEE) of 0.68 pJ/bit/iteration, which is a 1.8x improvement over random bit-flip annealing, and an 80% increase in throughput.
Keywords:
Annealing
combinatorial optimization
combinatorial optimization
Ising machine
Ising machine
LDPC decoding
LDPC decoding
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