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CRAlert: Hardware-Assisted Code Reuse Attack Detection
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DOI：10.1109/TCSII.2021.3118443.png)
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Abstract
En 中文
Code reuse attack (CRA) hijacking the control flow of programs for malicious actions without injecting any codes, has brought great concerns to system security. Most existing defenses incur high performance overhead or require the instruction set architecture (ISA) extension and compiler modification. In this brief, we present CRAlert, a new hardware-assisted CRA detection scheme, targets at mitigating the root causes of such code reuse attacks. CRAlert is compatible with the current SW/HW environment without requiring any architectural modifications to the processor core. As the proof-of-concept, we prototype the proposed framework on a Xilinx ML605 FPGA. The experimental results demonstrate that CRAlert could detect CRAs with an extremely low performance overhead (geometric mean) of 0.363%.
Keywords:
Codes
Indexes
Security
Circuits and systems
Field programmable gate arrays
Hardware
Pipelines
Security
hardware-assisted design
FPGA
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