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DEMC: A dynamic multi-ECC memory controller with per-block adaptation

delete2026-07-01
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PRE
AI
S
Stefani, Marco
S
Silva, Felipe
J
Jarbas Silveira
B
Borba, Giovanna
V
Vargas, Luthero
E
Edson Moreno *
C
César Marcon
DOI:10.1016/j.vlsi.2026.102728delete
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Abstract

Abstract

En 中文
Memory errors can lead to crashes, security vulnerabilities, data corruption, and loss, which are unacceptable in large-scale server systems. Traditional memory controllers mitigate such faults through static Error Correction Codes (ECCs), but environmental and technological variations cause error rates to fluctuate, making static ECCs suboptimal. This paper presents DEMC - a Dynamic Multi-ECC Memory Controller with Per-Block Adaptation, which dynamically selects the most suitable ECC for each memory block based on real-time error-rate monitoring and code efficacy. By combining multiple ECCs and adjusting protection strength at runtime, DEMC maintains reliability in fault-prone regions while preserving energy efficiency in error-free areas. Experimental results demonstrate that DEMC enhances energy efficiency by up to 70% and achieves a 99.956% application success probability under multi-bitflip conditions, outperforming static ECC-based controllers in both efficacy and efficiency.
Keywords:
Dynamic memory controller
Multi-ECC
Per-block adaptation
Reliability
Energy efficiency

Journal

I
INTEGRATION-THE VLSI JOURNAL
IF:
2.5
Papers:
120
Citations:
0

Organization

U
universidade federal do ceará
Scholars:
945
Papers: 303
Citations: 0
Cited Papers

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