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Diffraction-Driven Parallel Convolution Processing with Integrated Photonics
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DOI：10.1002/lpor.202400972.png)
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Abstract
En 中文
Traditional electronic processors often struggle with bandwidth limitations and high power consumption when executing extensive linear operations for deep learning tasks. Optical computing has emerged as a promising alternative, offering parallel and energy-efficient computation capabilities. Yet, the development of high-density optical computing architectures on integrated photonic platforms remains limited, hindered by constraints in neuron scalability and control engineering complexities. Addressing these challenges, this work presents a diffraction-driven multi-kernel optical convolution unit (MOCU) that enables on-chip parallel convolution processing. By utilizing cascaded silica 1D metalines as pre-trained large-scale weights and employing spatial multiplexing at the output, MOCU allows simultaneous passive computation of diverse convolutions within a single unit. This architecture facilitates the construction of optical convolutional neural networks (OCNNs), enabling efficient machine vision processing with a streamlined design. To mitigate errors in MOCU-embedded OCNNs, a lightweight electronic neural network operates concurrently to calibrate systematic deviations via a low-rank adaptation (LoRA) algorithm, with minimal overhead. The fabricated MOCU chip demonstrates the highest independent 8-kernel convolutions in parallel, each with a 3x3$3\times 3$ kernel size and occupying just 0.06 mm2${\rm mm}<^>2$. This architecture effectively merges photonic and electronic technologies, offering a scalable design pathway for energy-efficient, high-density deep learning hardware.
Keywords:
convolution
diffractive neural network
integrated photonics
photonic computing
Journal
L
IF:
10
Papers:
3.7K
Citations:
2.1W