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Discrete Memristor Hyperchaotic Maps
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DOI：10.1109/TCSI.2021.3082895.png)
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Abstract
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Regarding as a basic circuit component with special nonlinearity, memristor has been widely applied in chaotic circuits and neuromorphic circuits. However, discrete memristor (DM) has not been received much attention, yet. To this end, this paper reports a general DM model and its unified mapping model. Using the general DM model, four representations of DMs are given and their pinched hysteresis loops are exhibited. Based on the unified DM mapping model, four two-dimensional (2D) DM maps are generated and their parameter-relied and initials-relied behaviors are explored using multiple numerical measures. The results demonstrate that all the four 2D DM maps can generate hyperchaos with coexisting bi-stable or memristor initial-boosted behavior, and their sequences have excellent performance indictors. A hardware device is constructed to implement these maps and the analog voltage signals are experimentally acquired. Moreover, pseudo-random number generators (PRNGs) are designed using these DM maps and the test results show that the generated pseudo-random numbers (PRNs) have high randomness.
Keywords:
Memristors
Mathematical model
Integrated circuit modeling
Numerical models
Hysteresis
Chaotic communication
Chaos
Discrete map
discrete memristor
hardware device
hyperchaos
initial
pseudo-random number (PRN)
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