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Domain-Specific Hyperdimensional RISC-V Processor for Edge-AI Training
DOI:10.1109/TCSI.2025.3547039.png)
Abstract
En 中文
Edge AI has become the cornerstone of many applications. Yet, progress is limited by the large complexity of training a deep neural network (a DNN). hyperdimensional computing (HDC) is positioned as an alternative approach for Edge AI that is compact enough to enable training. The main challenge for an HDC model is to maintain its key features while balancing high inference accuracy with efficiency. A simple binary HDC model lacks accuracy, while the computational complexity of a floating-point model is too high. This work presents FixedHD, a novel 16-bit fixed-point HDC model enabling training at the Edge. FixedHD achieves an accuracy similar to floating-point model while lowering computational complexity. The model is supported by a customized RISC-V processor tailored to speedup both training and inference. The processor is extended with advanced HDC-specific instructions, a vector unit to utilize HDC’s parallel nature, and, for the first time, approximate computing to exploit its robustness. Further, memory requirements are reduced by quantizing mathematical functions and reducing the large HDC encoding matrix by up to 390 x. Compared to the baseline processor, inference and training are accelerated on average by 6.9 x and 3 x, respectively. The energy consumption is reduced by 4.6 x and 1.9 x at the cost of an increase in area by 45 %. The inference accuracy remains at the high level of floating-point models despite the heavy quantization and approximation.
Keywords:
AI acceleration
RISC-V
deep learning
machine learning
low power
edge AI
hyperdimensional computing
Journal
I
IF:
0
Papers:
268
Citations:
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