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Domain-Specific Optimization and Generation of High-Performance GPU Code for Stencil Computations

delete2018-11-01
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OA
AI
P
Prashant Singh Rawat
M
Miheer Vaidya
A
Aravind Sukumaran-Rajam
M
M. Ravishankar
V
Vinod Grover
A
Atanas Rountev
L
Louis-Noël Pouchet
P
P. Sadayappan *
DOI:10.1109/JPROC.2018.2862896delete
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Abstract

Abstract

En 中文
Stencil computations arise in a number of computational domains. They exhibit significant data parallelism and are thus well suited for execution on graphical processing units (GPUs), but can be memory-bandwidth limited unless temporal locality is utilized via tiling. This paper describes how effective tiled code can be generated for GPUs from a domain-specific language (DSL) for stencils. Experimental results demonstrate the benefits of such a domain-specific optimization approach over state-of-the-art general-purpose compiler optimizations.
Keywords:
General-purpose graphical processing unit (GPGPU)
resource optimization
stencil computations
streaming
tiling
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Proceedings of the IEEE cover
Proceedings of the IEEE
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University System of Ohio
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nvidia corporation
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Ohio State University
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