DystoHD: an area-efficient hyperdimensional computing system with dynamic hypervector generation for memory-constrained devices

doi:10.1007/s11227-026-08276-0

DystoHD: an area-efficient hyperdimensional computing system with dynamic hypervector generation for memory-constrained devices

2026-02-09

0

PRE

AI

DOI：10.1007/s11227-026-08276-0

Original

Original request for help

Save

Abstract

En 中文

This paper proposes DystoHD, a novel area-efficient and end-to-end hyperdimensional computing (HDC) system. By dynamically generating feature hypervectors and reusing position hypervectors within a systolic array architecture, DystoHD eliminates the need for large static base hypervector storage, significantly reducing memory footprint and access overhead. This design allows for the concurrent deployment of encoding and inference modules at a tiny hardware cost. In addition, DystoHD enhances computational efficiency and architectural scalability by exploiting fine-grained parallelism and resource reuse. We evaluate DystoHD using both FPGA implementation and 45 nm process synthesis. Experimental results show that compared with prior art, DystoHD reduces the memory overhead by at least 64.2% with similar classification accuracy on several datasets. Compared to prior FPGA-based and ASIC-based HDC hardware, DystoHD reduces the area-delay product by least 62.0% and 40.6%, respectively.

Keywords:

Brain-inspired computing

Hyperdimensional computing

Stochastic encoding

Memory-efficient

Dynamic encoding

Resource-constrained devices

DystoHD: an area-efficient hyperdimensional computing system with dynamic hypervector generation for memory-constrained devices

Abstract

Journal

Organization