Effective switchless inter-FPGA memory networks

doi:10.1016/j.jpdc.2023.05.002

Effective switchless inter-FPGA memory networks

2023-09-01

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DOI：10.1016/j.jpdc.2023.05.002

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FPGA network bandwidth increases to 400 Gbps or higher by high-density optical integration, e.g., Co-Packaged Optics (CPO) and onboard Si-photonics transceivers. This study presents its lightweight switchless network architecture by exploiting an indirect path, consisting of up to k one-hop paths for a diameter -k network topology. It integrates interconnection network and memory channels into a lightweight memory-to-memory inter-FPGA network. It has a uni-directional network topology for connecting the largest number of FPGAs. A newly introduced indirect flow control enables lossless uni-directional networks. We present multi-path point-to-point communications, multi-port message -combine collective communications, and efficient WDM (Wavelength Division Multiplexing) cabling method for the uni-directional networks. We implement and evaluate the uni-directional switchless network on an FPGA cluster consisting of six custom Stratix10 MX2100 FPGA cards connected with a 16-wavelength Arrayed Waveguide Grating (AWG) router. Simulation results show that the multi -port message-combine collective communication achieves 7x faster than conventional communication with 272 FPGAs. Effective WDM cabling using 16 wavelengths decreases the number of cables by 88% compared with parallel optical cabling for 272 FPGAs.(c) 2023 Elsevier Inc. All rights reserved.

Keywords:

Interconnection network

Uni-directional network topology

Collective communication

Field -programmable gate array (FPGA)

Wavelength division multiplexing (WDM)

Effective switchless inter-FPGA memory networks

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