Efficient mapping method for network-on-chip based on hiking optimization algorithm

Zhi Cheng

doi:10.1007/s11227-026-08411-x

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Efficient mapping method for network-on-chip based on hiking optimization algorithm

2026-03-12

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DOI：10.1007/s11227-026-08411-x

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Abstract

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Network-on-Chip (NoC) with a two-dimensional network structure has become a mainstream architecture in System-on-Chip (SoC) design due to its simplicity and manufacturing advantages. Application mapping, which involves assigning application tasks to different processing cores on a chip and optimizing the communication paths between them, directly affects the energy efficiency of a system. To enhance global exploration in large-scale discrete NoC mapping problems, this paper presents the first attempt to introduce the hiking optimization algorithm (HOA) into NoC application mapping. While HOA exhibits strong global exploration capability, it suffers from limited population diversity at initialization and insufficient recombination and refinement effectiveness when applied to large-scale discrete mapping spaces, which may lead to premature convergence and suboptimal solutions. To address these limitations, a chaotic mapping-based population initialization strategy is introduced to enhance the diversity and distribution uniformity of candidate mappings. Building upon this enriched population, a genetic algorithm based enhancement with problem-specific operators is incorporated to improve solution refinement. Specifically, an adaptive crossover strategy and multi-strategy mutation are designed to better preserve mapping feasibility while promoting effective information exchange and diversity maintenance during evolution. In addition, lightweight algorithmic modifications together with a two-opt local search are employed to further accelerate convergence and strengthen local exploitation. Extensive experiments on standard real-world benchmarks and TGFF large random graphs demonstrate that the proposed algorithm achieves faster convergence while delivering superior performance. Compared with NCTPAM, LMGA, PSO, DE, and HOA, the proposed method reduces communication cost by 29.78% on average, decreases energy consumption by 4.07%, lowers latency by 2.02%, and improves throughput by 5.68%, respectively. These results confirm the effectiveness of the proposed approach for large-scale NoC application mapping.

Keywords:

System-on-chip (SoC)

Network-on-chip (NoC)

Hiking Optimization Algorithm (HOA)

Chaotic mapping

Application mapping

Genetic algorithm (GA)