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Energy-efficient computing at cryogenic temperatures
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DOI：10.1038/s41928-024-01278-x.png)
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Abstract
En 中文
Increasing demand for data-intense computing applications-such as artificial intelligence, large language models and high-performance computing-has created a need for computing infrastructure that can handle large workloads with high energy efficiency. Advances in silicon-based complementary metal-oxide-semiconductor technology have led to more efficient field-effect transistors, but these devices are fundamentally limited by thermionic injection. As a result, on-off switching efficiency cannot be improved beyond 60 mV of drive voltage per decade of current. Operation of electronics at cryogenic temperatures, such as 77 K, can overcome this limit and provide performance improvements. Here we explore the development of computing at cryogenic temperatures. We examine the changes in electrical transistor and material properties observed at low temperatures, and highlight the need for further studies on cryogenic noise, reliability, variability and thermal management. We also consider the potential performance improvements at the device and circuit level of such technology. This Perspective examines the performance advantages and challenges of operating complementary metal-oxide-semiconductor (CMOS) devices at cryogenic temperatures.
Keywords:
LOW-FREQUENCY NOISE
BULK-CMOS
TRANSISTORS
FDSOI
PERFORMANCE
INTERFACE
CIRCUITS
IMPACT
Journal
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40.9
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