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Energy-efficient computing-in-memory architecture for AI processor: device, circuit, architecture perspective

delete2021-05-11
delete14
PRE
AI
L
Liang Chang
C
Chenglong Li
Z
Zhaomin Zhang
J
Jianbiao Xiao
Q
Qingsong Liu
Z
Zhen Zhu
W
Weihang Li
Z
Zixuan Zhu
S
Siqi Yang
J
Jun Zhou *
DOI：10.1007/s11432-021-3234-0delete
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Abstract

Abstract

En 中文
An artificial intelligence (AI) processor is a promising solution for energy-efficient data processing, including health monitoring and image/voice recognition. However, data movements between compute part and memory induce memory wall and power wall challenges to the conventional computing architecture. Recently, the memory-centric architecture has been revised to solve the data movement issue, where the memory is equipped with the compute-capable memory technique, namely, computing-in-memory (CIM). In this paper, we analyze the requirement of AI algorithms on the data movement and low power requirement of AI processors. In addition, we introduce the story of CIM and implementation methodologies of CIM architecture. Furthermore, we present several novel solutions beyond traditional analog-digital mixed static random-access memory (SRAM)-based CIM architecture. Finally, recent CIM tape-out studies are listed and discussed.
Keywords:
energy efficiency
computing-in-memory
non-volatile memory
test demonstrators
AI processor
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Journal

Science China Information Sciences cover
Science China Information Sciences
IF:
7.6
Papers:
4.9K
Citations:
8.9K

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