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Energy-Efficient Knapsack Optimization Using Probabilistic Memristor Crossbars
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DOI：10.1002/aisy.202401114.png)
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Abstract
En 中文
Constrained optimization underlies crucial societal problems, for instance, stock trading and bandwidth allocation. However, it is often computationally hard, in that complexity grows exponentially with problem size. The big-data era urgently demands low-latency and low-energy optimization at the edge, which cannot be handled by digital processors due to their non-(parallel von Neumann architecture. Recent efforts using massively parallel hardware (e.g., memristor crossbars and quantum processors) employing annealing algorithms, while promising, have handled relatively easy and stable problems with sparse or binary representations, such as the max-cut or traveling salesman problems. However, most real-world applications embody three features, which are encoded in the knapsack problem, and cannot be handled by annealing algorithms—dense and nonbinary representations, with destabilizing self-feedback. Herein, a post-digital-hardware-friendly randomized competitive Ising-inspired (RaCI) algorithm performing knapsack optimization, experimentally implemented on a foundry-manufactured complementary metal-oxide-semiconductor-integrated probabilistic analog memristor crossbar, is demonstrated. This solution outperforms digital and quantum approaches by over four orders of magnitude in energy efficiency.
Keywords:
analog computing
knapsack problem
memristors
memory semiconductors
optimization
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