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Event-based SerDes telemetry network for distributed brain computer interfaces
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DOI：10.1088/2634-4386/ae2cc2.png)
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Abstract
En 中文
Intracortical brain computer interfaces hold the potential to revolutionize neurotherapeutics, but they must overcome technological challenges such as the high data rates generated by high-channel-count neural sensors and the stringent power and volume constraints of implantable devices. In addition, the brain-wide coverage needed for a deeper understanding of brain processes challenges the synchronization between distributed neural sensors and the central neural hub. To address these challenges, we present a deterministic-latency and power-efficient serializer–deserializer (SerDes) telemetry network that effectively mitigates the synchronization issue under strict power and volume constraints. The serializer on the sensor side employs event-based sampling and a packet-based address-event representation transmission protocol, achieving a low power consumption of only 127 µW and a low latency variation <10 µs. A crystal-free clock source is employed on the sensor side to minimize power consumption, with serialized data encoded using Manchester coding scheme. The deserializer on the hub handles the bit period uncertainty by counting and extracting the bit period of received data with a clock only ∼2.2× faster than the serializer clock. The proposed counting-based Manchester decoder achieves a wide frequency coverage up to 204 000 ppm of frequency variation. The deserializer achieves a measured Manchester decoding bit error rate (BER <10−6), with a total estimated power consumption below 415 µW. The SerDes performance has been validated with in vivo pre-recorded data, demonstrating a compression ratio greater than 7, while preserving a high signal fidelity with an average RMSE <6 µVRMS.
Journal
IF:
6.1
Papers:
340
Citations:
920