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Fb-FaceBoxes: FPGA-based face detection using repetitive kernels and memory-access optimization
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DOI：10.1007/s11554-026-01954-5.png)
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Abstract
En 中文
Face detection serves as a critical first step in many computer vision applications and has advanced significantly with the advent of convolutional neural networks (CNNs). Despite their effectiveness, CNN-based algorithms often require substantial computational resources, making hardware acceleration using FPGAs essential for real-time processing. FaceBoxes, one of the most accurate face detection algorithms, poses particular challenges for FPGA implementation due to its high computational complexity. In this paper, we propose an FPGA-based CNN inspired by FaceBoxes that significantly reduces hardware resource utilization and memory access requirements. The proposed network increases the number of layers while reducing filter sizes, and an optimized hardware architecture tailored to this network is presented. The design employs only $$3 \times 3$$ convolutional kernels, achieving a minimal accuracy degradation of 2.8% compared with the original FaceBoxes network, while reducing the number of parameters by 3%. Experimental results demonstrate that the proposed architecture achieves 33 frames per second on an XC7K325 FPGA operating at 250 MHz with 18-bit fixed-point precision. The implementation utilizes 23K LUTs, 45K FFs, 14.4 Mbits of RAM, and 768 DSPs, demonstrating high efficiency and suitability for real-time face detection applications.
Keywords:
Face detection
Deep learning
Convolutional neural network
FPGA
FaceBoxes
Optimization
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