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Feature-Based Signal Selection for Post-Silicon Debug Using Machine Learning
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DOI：10.1109/TETC.2017.2787610.png)
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Abstract
En 中文
A key challenge of post-silicon validation methodology is to select a limited number of trace signals that are effective during post-silicon debug. Structural analysis used by traditional signal selection techniques are fast but lead to poor restoration quality. In contrast, simulation-based selection techniques provide superior restorability but incur significant computation overhead. While early work on machine learning based signal selection is promising [1] , it is still not applicable on large industrial designs since it needs thousands of simulations of large and complex designs. In this paper, we propose a signal selection technique that addresses the scalability issue of simulation-based techniques while maintaining a high restoration performance. The basic idea is to train a machine learning framework using a small set of circuits, and apply the trained model to the bigger circuit under test, without any need for simulating the large industry-scale designs. This paper makes two fundamental contributions: i) this is the first attempt to show that learning from small related circuits can be useful for signal selection, and ii) this is the first automated signal selection approach that is applicable on industrial designs without sacrificing restoration quality. Experimental results indicate that our approach can improve restorability by up to 135.4 percent (8.8 percent on average) while significantly reduce (up to 37X, 16.6X on average) the runtime compared to existing signal selection approaches.
Keywords:
Integrated circuit modeling
Training
Computational modeling
Predictive models
Electronic mail
Industries
Supervised learning
Post-silicon debug
machine learning
signal selection
feature selection
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