.png){kind=icon}
.png){kind=icon}
Return
Functionally-Possible Subcircuit-Based Tests for Path Delay Faults
.png){kind=icon}
OA
AI
DOI：10.1109/ACCESS.2025.3539981.png)
.png){kind=icon}
Original request for help.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
Advanced chip fabrication technologies are susceptible to defects of various types, including small delay defects that are modeled by path delay faults. Structural (scan-based) tests targeting the detection of hardware defects use scan chains to control and observe the circuit state. Between scan operations, a small number of functional capture cycles (typically one or two) is used for activating faults and capturing the circuit response in the scan chains for observation. Functional tests complement scan-based tests by exercising the circuit at-speed for a large number of clock cycles without using the scan chains. Functional tests are important for the detection of defects that can only be detected under functional operation conditions, or after a large number of clock cycles of functional operation. Multicycle scan-based tests offer some of the benefits of functional tests with the significantly lower costs of scan-based tests. Motivated by these benefits, this article suggests a special type of multicycle scan-based tests with functional properties for the detection of path delay faults. While ensuring functional operation conditions, a test propagates path delay faults through the same subcircuit in consecutive clock cycles to exercise the subcircuit, and enhance the ability to detect small delay defects in it. Experimental results are presented for benchmark circuits in an academic simulation environment to demonstrate the existence of tests with these properties.
Keywords:
Functionally-possible faults
functionally-possible tests
multicycle scan-based tests
multicycle scan-based tests
path delay faults
path delay faults
switching activity
switching activity
test generation
test generation
test generation
