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Fuzzy logic-based embedded system for video de-interlacing
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DOI：10.1016/j.asoc.2013.01.015.png)
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Abstract
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Video de-interlacing algorithms perform a crucial task in video processing. Despite these algorithms are developed using software implementations, their implementations in hardware are required to achieve real-time operation. This paper describes the development of an embedded system for video de-interlacing. The algorithm for video de-interlacing uses three fuzzy logic-based systems to tackle three relevant features in video sequences: motion, edges, and picture repetition. The proposed strategy implements the algorithm as a hardware IP core on a FPGA-based embedded system. The paper details the proposed architecture and the design methodology to develop it. The resulting embedded system is verified on a FPGA development board and it is able to de-interlace in real-time. (C) 2013 Elsevier B.V. All rights reserved.
Keywords:
Embedded system
Video de-interlacing
Fuzzy system
IP core
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