Graded Post-Processing Assisted Heterojunction Interface for High Performance Oxide Transistors

doi:10.1002/adfm.74701

Graded Post-Processing Assisted Heterojunction Interface for High Performance Oxide Transistors

2026-02-28

0

PRE

AI

DOI：10.1002/adfm.74701

Original

Original request for help

Save

Abstract

En 中文

This work addresses the urgent demand for high-performance and high-stability oxide TFTs in the context of 3D integration and advanced logic technologies. This approach, under a low thermal budget (200°C), enhances the overall performance of the device by inducing a high-density and high-mobility 2D electron gas (2DEG) at the interface, optimizing the distribution of oxygen vacancies (VO), and reducing the density of bulk defects. The results show that a 6-nm ITO/18-nm ITZON:O TFT achieves an effective field mobility of 109.35 cm2/Vs, a switching ratio of 108, and a threshold voltage of −1.05 V. The threshold voltage shifts under positive and negative bias stress are stable within 1.05 and −0.25 V, respectively. This study also indicates that in the post-treatment process with classification, the contribution of oxygen plasma treatment to the performance improvement is relatively significant. This strategy has strong universality for the material design and structure optimization of developing high-performance oxide heterojunctions, and provides an effective solution for high-performance oxide transistors compatible with the back-end processes of complementary metal oxide semiconductor (CMOS).

Keywords:

heterojunction engineering

oxide channel

performance

post-processing

transistors

Graded Post-Processing Assisted Heterojunction Interface for High Performance Oxide Transistors

Abstract

Journal

Organization