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Hierarchical Parallel Vision Processor for High-Speed Ship Detection
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DOI：10.1109/TCSII.2022.3218302.png)
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Abstract
En 中文
Ship detection is essential in ship rescue and marine traffic safety. However, high-speed real-time ship detection has become problematic in practical applications. In this brief, we propose a high-performance ship detection system utilizing the co-design of algorithm and hardware. First, the proposed Coarse-to-Fine Classification and Segmentation algorithm contains a two-stage convolutional neural network. It quickly locates the Region of Interest (RoI) and then accurately locates the ship's position in the RoI without low-parallelism non-maximum suppression (NMS) post-processing. Second, we proposed a Hierarchical Parallel Vision Processor, including a pixel-parallel processing unit, a patch-parallel processing unit, and a global micro-processing unit, ensuring high-speed processing with different parallelism. Finally, we designed a high-speed real-time ship detection system. The experimental results show that our ship detection system based on the frequency of 100Mhz on Arria 10 FPGA can achieve a speed of 4778FPS, which is beneficial in practical applications.
Keywords:
Ship detection
vision processor
coarse-to-fine
parallel computing
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