.png){kind=icon}
.png){kind=icon}
Return
High-Performance p-Type 1D Van der Waals Electronics Prepared Through Solution Processing
.png){kind=icon}
PRE
AI
DOI：10.1002/adma.202507007.png)
.png){kind=icon}
Original request for help.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
Solution-based methods have emerged as a promising approach for large-scale and low-cost electronics fabrication. However, solution processing has rarely realized high-performance p-type transistors, impeding the advancement of solution-processed electronics. Among the various solution-processable material families, van der Waals (vdW) systems stand out due to several attractive features, one of which is the atomically defined interfaces that facilitate carrier charge transport, enabling enhanced device performance. Here, the preparation of transistors based on single tellurium (Te) nanowires (NW) is demonstrated, achieving high mobilities averaging ≈370 cm2 V−1 s−1. Notably, subsequent studies reveal that devices based on Te-Te NW junctions exhibit mobilities comparable to those of the individual NWs forming the junction. This indicates that the vdW contact between the Te NWs causes negligible degradation in the mobility, which aligns with the theoretical calculations. Based on this finding, a large-area 1D Te NWs vdW film is further prepared, consisting of a large number of 1D Te NWs interconnected by vdW junctions. The resulting transistors can still maintain remarkable operating characteristics, including an average field-effect hole mobility of ≈94.9 cm2V−1s−1, a subthreshold swing of ≈248.6 mVdec−1, a current on/off ratio of ≈104, and a low operating voltage of 1 V.
Keywords:
high mobility
large area
p-type semiconductor
solution process
Journal
IF:
26.8
Papers:
3.4W
Citations:
46.0W