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High-performance parallel computing for next-generation holographic imaging
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DOI：10.1038/s41928-018-0057-5.png)
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Abstract
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Holography is a method of recording and reproducing three-dimensional (3D) images, and the widespread availability of computers has encouraged the development of holographic 3D screens (electroholography). However, the technology has not yet been used in practical applications because a hologram requires an enormous volume of data and modern computing power is inadequate to process this volume of data in real time. Here, we show that a special-purpose holography computing board, which uses eight large-scale field-programmable gate arrays, can be used to generate 10(8)-pixel holograms that can be updated at a video frame rate. With our approach, we achieve a parallel operation of 4,480 hologram calculation circuits on a single board, and by clustering eight of these boards, we can increase the number of parallel calculations to 35,840. Using a 3D image composed of 7,877 points, we show that 108-pixel holograms can be updated at a video rate, thus allowing 3D movies to be projected. We also demonstrate that the system speed scales up in a linear manner as the number of parallel circuits is increased. The system operates at 0.25 GHz with an effective speed equivalent to 0.5 petaflops (10(15) floating-point operations per second), matching that of a high-performance computer.
Keywords:
SPECIAL-PURPOSE COMPUTER
GRAPHICS PROCESSING UNIT
COMPUTATIONAL CHIP
ELECTROHOLOGRAPHY
SYSTEM
HARDWARE
DISPLAY
TECHNOLOGY
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