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High performance short-block binary regular LDPC codes

delete2018-12-01
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OA
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L
Latifa Mostari *
T
Taleb-Ahmed, Abdelmalik
DOI:10.1016/j.aej.2017.09.016delete
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Abstract

Abstract

En 中文
LDPC code shows a good performance with long-block codes. However, certain channels are constrained to use short-block codes due to latency. Therefore, concatenated LDPC codes with iterative decoding is a good choice to get a good performance. Concatenated binary LDPC codes were introduced as a class of concatenated codes in which the LDPC codes are irregular codes having different parameters. Although irregular LDPC codes are more efficient than regular codes, irregular LDPC codes have an error floor and a higher encoding complexity than regular code. In this paper, in order to get a good performance/complexity trade-off with a short-block code, we investigate a parallel concatenation of two identical regular binary LDPC codes, using an inter-leaver. Simulation results show that the proposed code outperforms a single LDPC code. The proposed code needs less time decoding delay than a single LDPC code with the same iteration number. Also, the proposed code needs a less number of iterations to achieve the same performance of a single LDPC code that leads to less decoding complexity and decoding delay. A simplified algorithm, the min-sum algorithm, that is used to decode the component codes shows a small performance loss with respect to the sum-product algorithm. (C) 2018 Faculty of Engineering, Alexandria University. Production and hosting by Elsevier B.V. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).
Keywords:
LDPC code
Parallel concatenation
Iterative decoding
Sum-product algorithm
Min-sum algorithm
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Journal

Alexandria Engineering Journal cover
Alexandria Engineering Journal
IF:
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U
universite hassiba ben bouali de chlef
Scholars:
526
Papers: 413
Citations: 0
C
centre national de la recherche scientifique (cnrs)
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