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High Throughput Pipeline Decoder for LDPC Convolutional Codes on GPU
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DOI：10.1109/LCOMM.2015.2486764.png)
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Abstract
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In this letter, we present a graphics processing unit (GPU)-based LDPC convolutional code (LDPC-CC) pipeline decoder with optimized parallelism. The proposed decoder exploits different granularities of decoding parallelism for both the compute unified device architecture (CUDA) kernel execution stage and the data transfer stage. Moreover, the parameter selection criteria for decoder implementation are designed to avoid exhaustive search of all the combinations of parameters. The experiments are carried out on NvidiaGTX460 and GTX580 platforms. The results demonstrate the proposed decoder achieves about 3 times speedup compared to the existing GPU-based work.
Keywords:
LDPC convolutional code
GPU
pipeline decoder
parallelism
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