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Hybrid Task- and Data-Parallelization on Heterogeneous Platform Using Model-Based Tool and Library Function Generation
DOI:10.1109/ACCESS.2025.3639611.png)
Abstract
En 中文
Modern embedded systems such as autonomous vehicles and robotics increasingly rely on high-performance computing to satisfy real-time and data-intensive demands. Parallel code generation, which combines task- and data-parallelism, is essential to efficiently utilize heterogeneous platforms composed of CPUs and accelerators. This study proposes a model-based code-generation workflow that integrates Halide, a domain-specific language (DSL) for performance-optimized library generation, into a model-based parallelization framework. The proposed approach addresses the challenge of jointly optimizing task mapping, scheduling, and data partitioning in heterogeneous systems. For data- parallel tasks, we propose two integer linear programming (ILP) formulations: a function-based method assuming a function model of execution time and an interpolation-based method using sampled profiling data. This enables precise load balancing across the CPUs and accelerators. We performed experiments on random task graphs and practical Simulink models executed on both a PC and Jetson Orin Nano. Compared to the C code generated from Embedded Coder, our methods achieve over 650x on a PC and 50x on Jetson. The proposed ILP formulations outperformed other traditional task mapping and scheduling strategies. We also executed the tool under different heterogeneous computing APIs, including CUDA, OpenCL, and Vulkan, and conducted parallel performance tests to demonstrate its potential for portability.
Keywords:
Task mapping and scheduling
data parallelism
model-based development
multi-core processor
heterogeneous platform
Halide compiler
library generation
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IF:
3.6
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9.8W
Citations:
29.4W
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Cited Papers
Task Mapping and Scheduling on RISC-V MIMD Processor With Vector Accelerator Using Model-Based Parallelization
IEEE ACCESS
IF3.6

