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Image processing on high-performance RISC systems

delete1996-07-01
delete34
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OA
AI
P
Pierpaolo Baglietto *
M
Massimo Maresca
M
Mauro Migliardi
N
Nicola Zingirian
DOI:10.1109/5.503295delete
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Abstract

Abstract

En 中文
The recent progress of RISC technology has led to the feeling that a significant percentage of image processing applications, which in the past required the use of special purpose computer architectures or of ad hoc hardware, can now be implemented in software on low cost general purpose platforms. We decided to undertake the study described in this paper to understand the extent to which this feeling corresponds to reality. We selected a set of reference RISC-based systems to represent RISC technology, and identified a set of basic image processing tasks to represent the image processing domain. We measured the performance and studied the behavior of the reference systems in the execution of the basic image processing tasks by running a number of experiments based on different program organizations The results of these experiments are summarized in a table, which can be used by image processing application designers to evaluate whether RISC-based platforms are able to deliver the computing power required for a specific application. The study of the reference system behavior led us to draw the following conclusions. First, unless special programming solutions are adopted, image processing programs turn out to be extremely inefficient on RISC-based systems. This is due to the fact that present generation optimizing compilers are not able to compile image processing programs into efficient machine code. Second while computer architecture has evolved from the original flat organization toward a more complex organization, based, for example, on memory hierarchy and instruction level parallelism, the programming model upon which high-level languages (e.g., C, Pascal) are based has not evolved accordingly. As a consequence programmers are forced to adopt special programming solutions and tricks to bridge the gap between architecture and programming model to improve efficiency. Third, although processing speed has grown up much faster than memory access speed, in current generation single processor RISC systems image processing can still be considered compute-bound. As a consequence, improvements in processing speed (originated for example by a higher degree of parallelism) will yield improvements of an equal factor in applications.

Journal

Proceedings of the IEEE cover
Proceedings of the IEEE
IF:
25.9
Papers:
9.9K
Citations:
4.5W

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No organization information available
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