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Improved Affine Arithmetic-Based Precision Analysis for Polynomial Function Evaluation
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DOI：10.1109/TC.2018.2882537.png)
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Abstract
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Word-length allocation is the most important design phase to optimize hardware resources while guaranteeing a determined accuracy for circuits with fixed-point numbers. This paper presents an enhanced precision analysis for degree-n polynomial Horner's rule. It is based on affine arithmetic and introduces an error propagating formula for a degree-n polynomial Horner's rule. It takes into account quantization error of all the circuit's connections including the inputs. Furthermore, a tighter upper bound error is defined, exploiting the dependencies between intermediate connections. Hardware implementations show that the proposed upper bound results in an area reduction that reaches 70 percent.
Keywords:
Fixed-point arithmetic
affine arithmetic
precision analysis
word-length optimization
hardware function evaluation
polynomial approximation
VLSI systems
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