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Incremental Delta-Sigma ADCs: A Tutorial Review
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DOI：10.1109/TCSI.2020.3033458.png)
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Abstract
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In many sensor applications, a high-resolution analog-to-digital converter (ADC) is a key block. The use of an incremental delta-sigma ADC (IADC) is often well suited for such applications. While the energy-efficiency of IADCs has improved by several orders of magnitude over the past decade, the implementation of high performance IADCs, especially in battery-powered systems, is still challenging. This paper presents a tutorial review on energy-efficient IADCs and addresses the progress in this area. This paper describes the fundamentals of IADCs and energy-efficient hybrid IADC architectures. Various design techniques for improving the energy-efficiency of the IADCs are described. This paper is intended to serve as a starting point for the development of a new energy-efficient IADC.
Keywords:
Modulation
Quantization (signal)
Finite impulse response filters
Tutorials
Topology
Signal to noise ratio
Sensor systems
Analog-to-digital converter (ADC)
incremental ADC (IADC)
incremental delta-sigma (Δ Σ ) modulator
decimation filter
energy-efficiency
energy-efficient amplifier
chopping
FIR-DAC
integrator slicing
negative-R assisted integrator
and sensor interface
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