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Junction Temperature-Based Adaptive Short Circuit Detection Technique for SiC MOSFETs
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DOI：10.1109/tie.2026.3672851.png)
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Abstract
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Silicon carbide (SiC) MOSFETs have a low short-circuit (SC) withstand capacity. Hence, an SC detection circuit with a low SC detection time (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$t_{SCD}$</tex-math></inline-formula>) and high robustness is required to achieve an effective SC protection for SiC MOSFETs. To achieve both the objectives simultaneously, mostly two-stage SC detection techniques are suggested in the literature. The primary stage in these techniques is designed to have a very low <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$t_{SCD}$</tex-math></inline-formula>. However, a few of the suggested primary stage are known to have a low robustness while the others are known to be incapable of detecting a fault under load (FUL) SC condition. To improve the overall robustness and to identify FUL, a desaturation (DESAT)-based SC detection technique is usually used as a secondary stage. In a DESAT-based technique, the reference voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_\text{REF}$</tex-math></inline-formula>) for SC detection is kept based on the power device output characteristic and its worst-case operating junction temperature (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$T_{J}$</tex-math></inline-formula>). However, this leads to a suboptimal <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$t_{SCD}$</tex-math></inline-formula> as the device may not be operating at its worst-case <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$T_{J}$</tex-math></inline-formula> preceeding an SC event. Thereby, this may adversely affect the SC protection effectiveness by making the secondary stage slower. To address the aforementioned challenge, this manuscript proposes a novel technique to adaptively vary <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${V}_{REF}$</tex-math></inline-formula> based on the feedback of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$T_{J}$</tex-math></inline-formula> to achieve an optimal <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$t_{SCD}$</tex-math></inline-formula>. Further, the mathematical formulation for the rate at which <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{REF}$</tex-math></inline-formula> should be varied and operational constraints necessary to mitigate a misdetection during normal operation are also determined. Experimental investigation of the proposed technique is carried out by conducting SC at 800 V on a 1.2 kV rated SiC MOSFET. Results show up to 24.3<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> reduction in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$t_{SCD}$</tex-math></inline-formula> compared with the existing secondary protection technique.
Keywords:
DESAT
junction temperature
SiC MOSFET
short circuit detection
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7.2
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9.8W
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