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Latency-aware path-feasibility selection for optical circuit switching in data-center networks
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DOI：10.1117/1.OE.65.4.048103.png)
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Abstract
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This paper addresses latency reduction in optical circuit switching for data-center networks, where a large number of users and dense traffic conditions impose stringent delay constraints. An 8 & times;8 optical switching interconnect is designed, in which path feasibility is evaluated based on the distance between input and output ports to support low-latency data transmission. A recurrent learning framework using long short-term memory is employed to assist in port-path selection by analyzing all possible input-output combinations. The trained model enables early identification of feasible paths associated with lower switching delay and reduced reception errors. Simulation results demonstrate that the proposed approach achieves a minimum switching latency of 0.32 to 0.4 ns, along with a bit-error rate on the order of 10(-17) to 10(-18). An extinction ratio of approximately 20 dB is also obtained, indicating improved signal integrity. The results show that latency-aware path-feasibility selection can enhance the operational performance of optical circuit switching in data-center networks without increasing architectural complexity.
Keywords:
optical circuit switching
data-center networks
latency-aware path selection
optical interconnects
bit-error rate
switching performance
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1.2
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178
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1.1W
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