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Low-Complexity Parallel QPP Interleaver Based on Permutation Patterns

delete2013-03-01
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PRE
AI
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Bongjin Kim *
I
Injae Yoo
I
In‐Cheol Park
DOI:10.1109/TCSII.2013.2240911delete
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Abstract

Abstract

En 中文
In this brief, we present how parallel-interleaved addresses generated by a quadratic permutation polynomial (QPP) interleaver are related to each other and propose a low-complexity parallel QPP interleaver based on the relationship. While a conventional parallel turbo decoder employs a number of interleavers as many as the parallel factor, the proposed method, which benefits from the arithmetic relationship denoted as the permutation pattern (PP), supports the parallel interleaving using only a single interleaver, resulting in a notable reduction of complexity. The strength of the proposed method stems from the fact that the PP is fully determined by only the decoding parameters, such as block size, parallel factor, and QPP coefficients. Experiment results on the Long Term Evolution turbo codes show that the proposed interleaver can significantly reduce the hardware complexity compared with conventional implementations.
Keywords:
Parallel architecture
permutation pattern (PP)
quadratic permutation polynomial (QPP) interleaver
turbo decoder

Journal

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
Papers:
8.8K
Citations:
2.5W

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