Low-Overhead Total Memory Encryption and Authentication on a RISC-V Processor

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doi:10.1007/978-981-95-4963-4_36

Low-Overhead Total Memory Encryption and Authentication on a RISC-V Processor

2026-01-01

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DOI：10.1007/978-981-95-4963-4_36

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This work presents a Total Memory Encryption and Authentication (TMEA) cache, implemented on a RISC-V processor, designed to protect against memory subsystem attacks. The industry-standard AES-GCM authenticated encryption algorithm, the proposed TMEA cache, transparently secures the confidentiality and integrity of every cache line. As a result, the evaluation shows that this robust security solution has minimal performance impact, introducing less than 4% overhead.

Keywords:

RISC-V

Edge Security

Memory Encryption

Authenticated Encryption

Low-Overhead Total Memory Encryption and Authentication on a RISC-V Processor

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