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Low-Power Circuits for Brain-Machine Interfaces

delete2008-09-01
delete73
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OA
AI
R
Rahul Sarpeshkar *
W
Woradorn Wattanapanitch
S
Scott K. Arfin
B
Benjamin I. Rapoport
S
Soumyajit Mandal
M
Michael W. Baker
M
Michale S. Fee
S
Sam Musallam
R
Richard A. Andersen
DOI:10.1109/TBCAS.2008.2003198delete
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Abstract

Abstract

En 中文
This paper presents work on ultra-low-power circuits for brain-machine interfaces with applications for paralysis prosthetics, stroke, Parkinson's disease, epilepsy, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; low-power radio-frequency (RF) impedance-modulation circuits for data telemetry that minimize power consumption of implanted systems in the body; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons with power-conserving sleep modes and awake modes. Experimental results from chips that have stimulated and recorded from neurons in the zebra finch brain and results from RF power-link, RF data-link, electrode-recording and electrode-stimulating systems are presented. Simulations of analog learning circuits that have successfully decoded prerecorded neural signals from a monkey brain are also presented.
Keywords:
Brain-machine interfaces
low-power
prosthetics
wireless neuroscience

Journal

IEEE Transactions on Circuits and Systems I-Regular Papers cover
IEEE Transactions on Circuits and Systems I-Regular Papers
IF:
5.2
Papers:
9.7K
Citations:
2.2W

Organization

H
Harvard Medical School
Scholars:
6.5W
Papers: 4.8W
Citations: 91