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Max-Pooling PD: A Machine Learning-Based Timing Recovery Method

delete2025-01-01
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PRE
AI
A
Arash Hoseyninejad *
H
Hossein Shakiba
D
D.A. Johns
DOI:10.1109/TCSI.2024.3524336delete
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Abstract

Abstract

En 中文
This paper presents a max-pooling phase detector (PD) designed to significantly reduce power consumption and area compared to conventional baud-rate detectors such as the Mueller-Mueller (MMPD) and Sign-Sign MMPD (SS-MMPD). The PD was originally developed using a convolutional neural network (CNN) model and trained within a machine-learning (ML) framework optimized for the provided training dataset. The design method was completed using a minimum mean square error (MMSE) approach to address discrepancies between training conditions and real-world operation, enabling traditional adaptation methods to enhance the performance and robustness of the PD. Synthesized in the GF 22-nm FD-SOI process, the max-pooling PD consumes 40% less power and occupies 60% less area than a standard SS-MMPD.
Keywords:
Noise
Timing
Clocks
Jitter
Detectors
Training
Receivers
Standards
Decision feedback equalizers
Power demand
Phase detector
CDR
SerDes
wire-line
machine learning
CNN

Journal

IEEE Transactions on Circuits and Systems I-Regular Papers cover
IEEE Transactions on Circuits and Systems I-Regular Papers
IF:
5.2
Papers:
9.7K
Citations:
2.2W

Organization

H
huawei technologies
Scholars:
3.3K
Papers: 2.9K
Citations: 1
U
university of toronto
Scholars:
14.7W
Papers: 12.0W
Citations: 165