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Memory and Communication Profiling for Accelerator-Based Platforms
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DOI：10.1109/TC.2017.2785225.png)
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Abstract
En 中文
The growing demand of processing power is being satisfied mainly by an increase in the number of homogeneous and heterogeneous computing cores in a system. Efficient utilization of these architectures demands analysis of memory-access behaviour of applications and perform data-communication aware mapping of applications on these architectures. Appropriate tools are required to highlight memory-access patterns and provide detailed intra-application data-communication information to assist developers in porting existing sequential applications efficiently to these architectures. In this work, we present the design of an open-source tool which provides such a detailed profile for C/C++ applications. In contrast to prior work, our tool not only reports detailed information, but also generates this information with manageable overheads for realistic workloads. Comparison with the state-of-the-art shows that the proposed profiler has, on the average, an order of magnitude less overhead as compared to the state-of-the-art data-communication profilers for a wide range of benchmarks. The experimental results show that our proposed tool generated profiling information for image processing applications which assisted in achieving a speed-up of 6.14x and 2.75x for heterogeneous multi-core platforms containing an FPGA and a GPU as accelerators, respectively.
Keywords:
Memory profiling
data-communication profiling
architecture-independent profiling
accelerator-based computing
communication-aware mapping
shadow memory
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