Memristor Parallel Computing for a Matrix-Friendly Genetic Algorithm

doi:10.1109/TEVC.2022.3144419

Memristor Parallel Computing for a Matrix-Friendly Genetic Algorithm

2022-10-01

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DOI：10.1109/TEVC.2022.3144419

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Matrix operation is easy to be paralleled by hardware, and the memristor network can realize a parallel matrix computing model with in-memory computing. This article proposes a matrix-friendly genetic algorithm (MGA), in which the population is represented by a matrix and the evolution of population is realized by matrix operations. Compared with the performance of a baseline genetic algorithm (GA) on solving the maximum value of the binary function, MGA can converge better and faster. In addition, MGA is more efficient because of its parallelism on matrix operations, and MGA runs 2.5 times faster than the baseline GA when using the NumPy library. Considering the advantages of the memristor in matrix operations, memristor circuits are designed for the deployment of MGA. This deployment method realizes the parallelization and in-memory computing (memristor is both memory and computing unit) of MGA. In order to verify the effectiveness of this deployment, a feature selection experiment of logistic regression (LR) on Sonar datasets is completed. LR with MGA-based feature selection uses 46 fewer features and achieves 11.9% higher accuracy.

Keywords:

Biological cells

Genetic algorithms

Memristors

Statistics

Sociology

Parallel processing

Computational modeling

Feature selection

genetic algorithms (GAs)

memristors

parallel computing

Memristor Parallel Computing for a Matrix-Friendly Genetic Algorithm

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