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Minimal Maximum-Level Programming-Combined Cell Mapping and Coding for Faster MLC Memory

delete2016-09-01
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A. L. Berman *
Y
Yitzhak Birk
DOI:10.1109/JSAC.2016.2603791delete
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Abstract

Abstract

En 中文
In multi-level-cell memory, such as flash and phase-change memory, shrinking cell size and the growing number of levels per cell worsen the access rate to capacity ratio and even reduce access rate. We present minimal maximum-level programming, a scheme for expediting cell programming by sharing physical cells among multiple data sectors and exploiting the fact that making moderate changes to a cell's charge level is faster than making large ones. In particular, we encode the data such that in the kth writing of data to a cell, only the lowest k+1 levels are utilized. Unlike in previously proposed cell-sharing schemes, different same-size data sectors occupy different numbers of physical cells, and a cell may hold a fraction of a bit of a given data sector. Nevertheless, the exposed sector size remains unchanged. Data are encoded, but without redundancy. In a four-level cell example, we achieve up to 75% reduction in write latency. Read latency may be degraded, depending on the percentage of utilized capacity.
Keywords:
Memory architecture
cache storage
flash memory cells
phase-change memory
system performance
signal design
modulation coding
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Journal

IEEE Journal on Selected Areas in Communications cover
IEEE Journal on Selected Areas in Communications
IF:
17.2
Papers:
6.4K
Citations:
3.1W

Organization

T
Technion Israel Institute of Technology
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1.6W
Papers: 1.5W
Citations: 2.0W