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Minimizing conflicts between vector streams in interleaved memory systems
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DOI：10.1109/12.762540.png)
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Abstract
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The performance of a vector processor accessing vectors placed in memory is strongly dependent on the conflicts produced in the memory subsystem. These conflicts delay the task of the functional units. There can be conflicts between elements of the same vector and between elements of different vector streams. It is known that the presence of the last kind of conflicts is the main cause of cycles lost. This paper proposes an order to access the elements of a vector stream that reduces the average memory access time in vector processors when several vector streams are concurrently accessed. The proposed order determines that the memory system observes the same stride for all the vector streams of a stride family. Conflicts between concurrent vector streams of the same family are completely eliminated ii the rate at which memory modules are requested is less than or equal to their service rate. For other cases, the number of lost cycles due to conflicts is dramatically reduced.
Keywords:
interleaved memory system
memory bandwidth
vector stream
concurrent access of vector streams
inter-vector-conflicts
hardware support
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