Neuronflow V2: Sparse and Energy Efficient Event-driven AI Processing

Orlando Moreira

doi:10.1109/mm.2026.3722146

Neuronflow V2: Sparse and Energy Efficient Event-driven AI Processing

2026-08-12

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DOI：10.1109/mm.2026.3722146

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Neuronflow V2 is a processor designed for efficient, low-latency AI inference by exploiting activation sparsity. Its event-driven, input-stationary architecture minimizes unnecessary computations, achieving millisecond latency and under 500 mW power for computer-vision models on edge devices. We show how sparsity-inducing training and thresholding enhance activation sparsity, allowing Neuronflow V2 to reduce energy use and latency while maintaining accuracy. We use Neural Architecture Search to re-balance weight and activation memory requirements, enabling effective temporal sparsity exploitation. Fabricated in 5nm at 800 MHz, Neuronflow V2 demonstrates scalable, energy-efficient brain-inspired performance on silicon.

Keywords:

Memory

Modeling

Media Access Control

Training

Weighted sum model

Permission

Convolution

Accuracy

Energy

Neurons

Neuronflow V2: Sparse and Energy Efficient Event-driven AI Processing

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