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OmpSs@FPGA Framework for High Performance FPGA Computing

delete2021-01-01
delete17
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OA
AI
M
Miguel de Haro, Juan *
J
Jaume Bosch
A
Antonio Filgueras
M
Miquel Vidal
D
Daniel Jiménez-González
C
Carlos Álvarez
X
Xavier Martorell
E
Eduard Ayguadé
J
Jesús Labarta
DOI:10.1109/TC.2021.3086106delete
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Abstract

Abstract

En 中文
This article presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the extension of the programming model addressed specifically to FPGAs. OmpSs environment is built on top of Mercurium source to source compiler and Nanos++ runtime system. To address FPGA specifics Mercurium compiler implements several FPGA related features as local variable caching, wide memory accesses or accelerator replication. In addition, part of the Nanos++ runtime has been ported to hardware. Driven by the compiler this new hardware runtime adds new features to FPGA codes, such as task creation and dependence management, providing both performance increases and ease of programming. To demonstrate these new capabilities, different high performance benchmarks have been evaluated over different FPGA platforms using the OmpSs programming model. The results demonstrate that programs that use the OmpSs programming model achieve very competitive performance with low to moderate porting effort compared to other FPGA implementations.
Keywords:
Field programmable gate arrays
Task analysis
Hardware
Runtime
Programming
Tools
Random access memory
FPGA
reconfigurable hardware
parallel architectures
task-based programming models
high-level synthesis
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Journal

IEEE Transactions on Computers cover
IEEE Transactions on Computers
IF:
3.8
Papers:
5.3K
Citations:
9.8K

Organization

U
universitat politecnica de catalunya
Scholars:
1.9W
Papers: 1.6W
Citations: 17