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OpenSync: Enabling Software-Defined Clock Synchronization in Deterministic Ethernet

delete2025-03-14
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OA
AI
Y
Yinhan Sun
J
Jinli Yan *
W
Wang, Zheng
Z
Zhigang Sun
DOI:10.3390/electronics14061145delete
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Abstract

Abstract

En 中文
Deterministic Ethernet (DetEth) is widely used in real-time distributed systems, such as avionics and in-vehicle control. Clock synchronization protocols (CSPs) establish global time, which is a critical foundation for deterministic communication in DetEth. However, existing protocols often lack flexibility, making customization and adaptation to specific scenarios difficult and time consuming. We propose OpenSync, which is a software-defined clock synchronization architecture that decouples the synchronization control plane from the data plane. OpenSync includes a programmable time data injector and a fine-grained calibrated timer in the data plane, enabling easy implementation with standard DetEth hardware and support for various CSPs. The control plane provides a synchronization library to configure local clocks and retrieve accurate time data for different methods. To validate OpenSync's generality and efficiency, we develop an FPGA-based prototype and implement three CSPs through software programming. A fully functional testbed demonstrates that these CSPs meet the accuracy and protocol consistency requirements of their respective application scenarios.
Keywords:
deterministic ethernet
time-triggered ethernet
time-sensitive networking
clock synchronization
software-defined architecture

Journal

Electronics cover
Electronics
IF:
2.6
Papers:
9.6K
Citations:
4.7W

Organization

N
Natl Innovat Inst Def Technol
Scholars:
28
Papers: 13
Citations: 6
N
natl univ def technol
Scholars:
1.5K
Papers: 509
Citations: 141