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Overcoming Variations in Nanometer-Scale Technologies

delete2011-03-01
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Sachin S. Sapatnekar *
DOI:10.1109/JETCAS.2011.2138250delete
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Abstract

Abstract

En 中文
Nanometer-scale circuits are fundamentally different from those built in their predecessor technologies in that they are subject to a wide range of new effects that induce on-chip variations. These include effects associated with printing finer geometry features, increased atomic-scale effects, and increased on-chip power densities, and are manifested as variations in process and environmental parameters and as circuit aging effects. The impact of such variations on key circuit performance metrics is quite significant, resulting in parametric variations in the timing and power, and potentially catastrophic failure due to reliability and aging effects. Such problems have led to a revolution in the way that chips are designed in the presence of such uncertainties, both in terms of performance analysis and optimization. This paper presents an overview of the root causes of these variations and approaches for overcoming their effects.
Keywords:
On-chip sensors
power supply variations
process variations
thermally aware design
thermal variations

Journal

IEEE Journal on Emerging and Selected Topics in Circuits and Systems cover
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
IF:
3.8
Papers:
1.4K
Citations:
2.8K

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No organization information available