.png){kind=icon}
Return
Phase Synchronization Operator for On-Chip Brain Functional Connectivity Computation
.png){kind=icon}
OA
AI
DOI：10.1109/TBCAS.2019.2931799.png)
.png){kind=icon}
.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
This paper presents an integer-based digital processor for the calculation of phase synchronization between two neural signals. It is based on the measurement of time periods between two consecutive minima. The simplicity of the approach allows for the use of elementary digital blocks, such as registers, counters, and adders. The processor, fabricated in a 0.18-$\mu$m CMOS process, only occupies 0.05mm$<^>2$ and consumes 15nW from a 0.5V supply voltage at a signal input rate of 1024S/s. These low-area and low-power features make the proposed processor a valuable computing element in closed-loop neural prosthesis for the treatment of neural disorders, such as epilepsy, or for assessing the patterns of correlated activity in neural assemblies through the evaluation of functional connectivity maps.
Keywords:
Functional connectivity
low power CMOS VLSI
neural signal processing
phase synchronization
seizure detection
AI Summary
Key information extracted from the uploaded paper, including a brief overview, abstract, background, key highlights, visual analysis, and future outlook.
Journal
IF:
5.2
Papers:
9.9K
Citations:
2.2W
Organization
Cited Papers
ShareSaveRapid brief feedback intracerebral stimulation based on real-time desynchronization detection preceding seizures stops the generation of convulsive paroxysms.png)
EPILEPSIAOAAI
EPILEPSIAIF6.6
OAAIShareSaveThe EPILEPSIAE database: An extensive electroencephalography database of epilepsy patientsEPILEPSIA
OAAI
EPILEPSIAIF6.6
OAAIShareSaveShareSaveShareSaveShareSaveA comparison of linear and non-linear strategies for energy harvesting from mechanical vibrationsOAAI
OAAIShareSaveShareSave
View more