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Post-Silicon Code Coverage for Multiprocessor System-on-Chip Designs
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DOI：10.1109/TC.2012.163.png)
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Abstract
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Effective techniques for post-silicon validation are required to better evaluate functional correctness of increasingly complex multi and many-core SoCs. However, there is little data evaluating the coverage of post-silicon validation efforts on industrial-scale designs. In this paper, we address this knowledge gap by instrumenting a nontrivial SoC with on-chip coverage monitors to measure the coverage achieved by typical post-silicon validation tests, such as booting the operating system (OS). We compare coverage achieved pre and post-silicon, and also measure the area overhead required to monitor post-silicon coverage. Our results show that the typical test of booting the OS often achieves high coverage, well correlated to what is achieved by pre-silicon directed tests, but in some blocks the coverage can be low or markedly different between pre and post-silicon, highlighting the importance of post-silicon validation in general and post-silicon coverage measurement in particular.
Keywords:
FPGA emulation
pre-silicon validation
post-silicon validation
code coverage
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