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Programmable photonic latch memory
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DOI：10.1364/OE.536535.png)
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Abstract
En 中文
Significant advancements in integrated photonics have enabled high-speed and energy efficient systems for various applications, from data communications and high-performance computing to medical diagnosis, sensing, and ranging. However, data storage in these systems has been dominated by electronic memories that in addition to signal conversion between optical and electrical domains, necessitates conversion between analog to digital domains and electrical data movement between processor and memory that reduce the speed and energy efficiency. To date, scalable optical memory with optical control has remained an open problem. Here, we report an integrated photonic set-reset latch as a fundamental optical static memory unit based on universal optical logic gates. As a proof of concept, experimental implementation of the universal logic gates and realistic simulation of the latch are demonstrated on a programmable silicon photonic platform. Optical set, reset, and complementary outputs, scalability to a large number of memory units via the independent latch supply light, and compatibility with wavelength division multiplexing scheme and different photonic platforms enable more efficient and lower latency optical processing systems.
Keywords:
OPTICAL RAM
LOW-POWER
Journal
IF:
3.3
Papers:
6.1W
Citations:
14.3W
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