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Reinforcement learning-driven net order selection for efficient analog IC routing

delete2025-12-01
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PRE
AI
Y
Yong Zhang
李文杰 cover
李文杰 (Wenjie Li)
G
Ge, Guo-Jing
J
Jin-Qiao Wang
贾博文 cover
贾博文 (Bo Jia) *
徐宁 cover
徐宁 (Ning Xu)
DOI:10.1016/j.vlsi.2025.102623delete
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Abstract

Abstract

En 中文
The A* algorithm is one of the most common analog integrated circuit (IC) routing techniques. As the number of nets increases, the routing order of this heuristic routing algorithm will affect the routing results immensely. Currently, artificial intelligence (AI) technologies are widely applied in IC physical design to accelerate layout design. In this paper, we propose a reinforcement model based on net order selection. We construct multichannel images of routing data and extract features of the coordinates of routing pins through an attention mechanism. After training, the model outputs an optimized net order, which is then used to perform routing with a bidirectional A* algorithm, thereby improving both the speed and efficiency of the routing process. Experimental results on cases based on 130-nm and 180-nm processes show that the proposed method can achieve a 2.5 % reduction in wire length and a 3.7 % decrease in the number of vias compared to state-of-the-art methods for analog IC routing. In terms of computational efficiency, the bidirectional A* algorithm improves performance by 7.3 % over the unidirectional A* algorithm in decision-making scenarios and by 51.09 % in the path-planning process. Simulation results further demonstrate that, compared with manual and advanced automation methods, the overall performance of the layout achieved by our method aligns most closely with schematic performance.
Keywords:
Analog IC routing
Reinforcement learning
Net order selection
Bidirectional A*

Journal

I
INTEGRATION-THE VLSI JOURNAL
IF:
2.5
Papers:
115
Citations:
0

Organization

C
Chinese Academy of Sciences
Scholars:
3.9W
Papers: 1.5W
Citations: 58.4W
W
Wuhan University of Technology
Scholars:
3.4W
Papers: 2.4W
Citations: 4.4W