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Research on Board-Level Simultaneous Switching Noise-Suppression Method Based on Seagull Optimization Algorithm
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DOI：10.3390/app152212100.png)
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Abstract
En 中文
In recent years, with the development of electronic products toward high frequency and high speed, Printed Circuit Board (PCB) routing technology has been continuously evolving to meet the requirements of complex signal transmission. Meanwhile, the increase in circuit frequency and device density has led to a sharp deterioration of simultaneous switching noise (SSN), which has escalated from a minor interference to a core bottleneck. SSN not only impairs signal integrity and increases bit error rate, but also interferes with circuit operation, causes device failure, and even leads to system collapse, becoming a fatal obstacle to the performance and reliability of high-frequency products. The SSN problem has become increasingly severe due to the rise in circuit operating frequency and device density, posing a key challenge in high-speed circuit design. To address the challenge of suppressing SSN at the PCB board level in high-speed digital circuits, this paper proposes a collaborative optimization scheme integrating simulation analysis and the Seagull Optimization Algorithm (SOA). In this study, a multi-physical field coupling model of SSN is established to reveal that SSN essentially arises from the electromagnetic interaction between the parasitic inductance of the power distribution network (PDN) and high-speed transient current. Based on the research on frequency-domain impedance analysis, time-domain response prediction, and decoupling capacitor suppression mechanism, the limitations of traditional capacitor placement in suppressing GHz-level high-frequency noise are overcome. This method enables precise power integrity (PI) design via simulation analysis frequency-domain parameter extraction and power-ground noise simulation quantify PDN impedance characteristics and the coprocessor switching current spectrum; resonance analysis locates key frequency points and establishes an SSN-planar resonance correlation model to guide decoupling design; finally, noise coupling analysis optimizes signal-power plane spacing, markedly reducing mutual inductance coupling. On this basis, the SOA is innovatively introduced to construct a multi-objective optimization model, with capacitor frequency, capacitance value, and package size as variables. A spiral search algorithm is used to balance noise-suppression performance and cost constraints. Simulation results show that this scheme can reduce the SSN amplitude by 37.5%, effectively suppressing the signal integrity degradation caused by SSN and providing a feasible solution for SSN suppression.
Keywords:
decoupling capacitor
power distribution network (PDN)
power integrity (PI)
Seagull Optimization Algorithm (SOA)
Simultaneous Switching Noise (SSN)
Journal
A
IF:
2.5
Papers:
7.3K
Citations:
4
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