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Runtime Task Scheduling for FPGA-Based Embedded Systems Using Just-in-Time Bitstream Prefetching
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DOI：10.1109/ACCESS.2024.3507376.png)
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Abstract
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Dynamically and partially reconfigurable Field Programmable Gate Arrays (FPGAs) offer high performances and flexibility. These platforms can hot-swap reconfigurable regions to change the hardware behavior at the cost of a reconfiguration process. The scheduling of applications and their reconfiguration processes are then essential to respect timing constraints. In this paper, we introduce PF-PEFT, a scheduling heuristic for dynamically reconfigurable FPGA architectures. Results show that our approach reduces schedules duration by up to 13% compared to a comparable state-of-the-art approach.
Keywords:
DPR
FPGA
just-in-time bitstream prefetch
just-in-time bitstream prefetch
reconfigurable computing
reconfigurable computing
runtime scheduling
runtime scheduling
runtime scheduling
Journal
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3.6
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9.8W
Citations:
29.4W
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