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Sampled-Data Time-Mode Analog Integrators

delete2025-12-01
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PRE
AI
K
Konstantinos P. Pagkalos *
O
Orfeas Panetas Felouris
S
S. Vlassis
DOI:10.1002/cta.70283delete
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Abstract

Abstract

En 中文
In this work, sampled-data time-mode lossless, leaky and bilinear approximation integrators are proposed, suitable for synchronous time-mode signal processing. The time-mode signal that is processed is the pulse width of constant-frequency pulses, which is equivalent to pulse-width modulation (PWM) processing. The integrators are designed based on a novel representation of time-domain information, which can process both positive and negative values and results in a new method for summation/subtraction PWM operation in time-mode. The output of integrators is directly in time-mode and synchronous with the sampling clock, and therefore, they can be used as modular blocks for higher complexity time-mode systems. The proposed integrators are implemented in TSMC 65-nm technology node, under 1.2-V voltage supply, with 5 MS/s sampling rate. Based on post-layout simulations, the power dissipation of lossless, leaky, and bilinear integrator is 61.9, 97.2, and 150 W, respectively.
Keywords:
bilinear integrator
leaky integrator
lossless integrator
PWM
time-domain
time integration
time-mode signal processing

Journal

International Journal of Circuit Theory and Applications cover
International Journal of Circuit Theory and Applications
IF:
1.6
Papers:
582
Citations:
2.9K

Organization

U
University of Patras
Scholars:
1.2W
Papers: 9.6K
Citations: 8.4K
Cited Papers

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